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Memory Configuration
3.3.2 Memory Switch Modes—Y Data Memory
Memory switch mode reallocates of portions of X and Y data RAM as program RAM. Bit 7 in
the OMR is the MS bit that controls this function, as follows:
When the MS bit is cleared, the Y data memory consists of the default 48K × 24-bit
memory space described in the previous section. In this default mode, the lowest external
Y data memory location is $6000.
When MS mode bit in the OMR is set, a portion of the higher locations of the internal Y
memory are switched to internal program memory. The memory switch configuration
(MSW[1:0]) bits in the OMR select one of the following options:
— MSW[1:0] = 00 —The 32K higher locations ($4000 – $BFFF) of the internal
Y memory are switched to internal program memory, and therefore the highest internal
Y memory location is $3FFF. The Y memory space at the switched locations ($4000 –
$BFFF) becomes reserved and should not be accessed. The lowest external Y memory
location is $C000.
— MSW[1:0] = 01 —The 24K higher locations ($6000 – $BFFF) of the internal
Y memory are switched to internal program memory, and therefore the highest internal
Y memory location is $5FFF. The Y memory space at the switched locations ($6000 –
$BFFF) becomes reserved and should not be accessed. The lowest external Y memory
location is $C000.
— MSW[1:0] = 10 —The 8K higher locations ($8000 – $BFFF) of the internal Y memory
are switched to internal program memory, and therefore the highest internal Y memory
location is $7FFF. The Y memory space at the switched locations ($8000 – $BFFF)
becomes reserved and should not be accessed. The lowest external Y memory location
is $C000.
— MSW[1:0] = 11 —The 4K higher locations ($A000 – $BFFF) of the internal
Y memory are switched to internal program memory, and therefore the highest internal
Y memory location is $9FFF. The Y memory space at the switched locations
($A000-$BFFF) becomes reserved and should not be accessed. The lowest external Y
memory location is $C000.
Note:
3-6
The 10K lowest locations ($0-$27FF) of the internal Y memory are shared memory ,
which is accessible both to the core and the EFCOP. The EFCOP connects to the
shared memory in place of the DMA bus. Therefore, DMA cannot access the shared
memory, and simultaneous accesses by the core and EFCOP to the same memory bank
(of 256 locations) of the shared memory are not permitted. It is your responsibility to
prevent such simultaneous accesses.
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
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